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tc1054 1 preliminary information tc1054-01 6/12/97 50ma cmos ldo with shutdown and error output general description the tc1054 is a high accuracy (typically 0.5%) cmos upgrade for older (bipolar) low dropout regulators. de- signed specifically for battery-operated systems, the tc1054s cmos construction eliminates wasted ground current, significantly extending battery life. total supply current is typically 50 m a at full load ( 20 to 60 times lower than in bipolar regulators !). tc1054 key features include ultra low noise operation, very low dropout voltage (typically 100mv at full load) and internal feed-forward compensation for fast response to step changes in load. an error output (error) is asserted when the tc1054 is out-of-regulation (due to a low input voltage or excessive output current). error can be used as a low battery warning or as a processor reset signal (with the addition of an external rc network). supply current is reduced to less than 1 m a, and both v out and error are disabled when the shutdown input is low. the tc1054 incorporates both over-temperature and over-current pro- tection. the tc1054 is stable with an output capacitor of only 1 m f and has a maximum output current of 50ma. for higher output current regulators, please see the tc1055 (i out = 100ma) regulator and tc1107, tc1108 (i out = 300ma) data sheets. 50ma cmos ldo with shutdown and error output tc1054 pin configuration features n zero ground current for longer battery life n very low dropout voltage n guaranteed 50ma output n high output voltage accuracy n standard or custom output voltages n power-saving shutdown mode n error output can be used as a low battery detector, or processor reset generator n over-current and over-temperature protection n space-saving sot-23a-5 package n pin compatible upgrades for bipolar regulators applications n battery operated systems n portable computers n medical instruments n instrumentation n cellular/gsms/phs phones n linear post-regulators for smps n pagers telcom semiconductor reserves the right to make changes in the circuitry and specifications of its devices typical application tc1054 (sot-23a-5*) top view 2 shdn error gnd v out v in 4 5 3 1 ordering information output junction part no. voltage **(v) package temp. range tc1054-2.5vct 2.5 sot-23a-5* C 40 c to +125 c tc1054-2.7vct 2.7 sot-23a-5* C 40 c to +125 c tc1054-3.0vct 3.0 sot-23a-5* C 40 c to +125 c tc1054-3.3vct 3.3 sot-23a-5* C 40 c to +125 c tc1054-5.0vct 5.0 sot-23a-5* C 40 c to +125 c note: *sot-23a-5 is equivalent to the eiaj (sc-74a) ** other output voltages available. please contact telcom semiconductor for details 1 f shutdown control (from power control logic) tc1054 v in 1 2 34 5 v in v out error shdn gnd 1m v out error note: *sot-23a-5 is equivalent to the eiaj (sc-74a)
tc1054 50ma cmos ldo with shutdown and error output 2 preliminary information tc1054-01 6/12/97 electrical characteristics: v in = v out + 1v, i l = 0.1ma, c l = 3.3 m f, shdn > v ih , t a = 25 c, unless otherwise noted. boldface type specifications apply for junction temperatures of C 40 c to +125 c. symbol parameter test conditions min typ max units v in input operating voltage 6.5 v i out max maximum output current 50 ma v out output voltage note 1 v r C 2.5% v r 0.5% v r + 2.5% v tc v out v out temperature coefficient note 2 ppm/ c 40 d v out / d v in line regulation (v r + 1v) < v in < 6v 0.01 0.05 %/v d v out /v out load regulation i l = 0.1ma to i out max 0.5 % (note 3) v in C v out dropout voltage i l = 0.1ma 5 mv i l = 20ma 65 i l = 50ma 95 (note 4) i gnd ground pin current i l = i out max, (note 5) 0 m a i in supply current shdn = v ih , i l = 0 50 m a i insd shutdown supply current shdn = 0v 0.05 m a r out output resistance during shutdown shdn < v il 100 x v r 160 x v r k w psrr power supply rejection ratio f re 1khz 64 db i out sc output short circuit current v out = 0v 200 450 ma d v out / d p d thermal regulation note 6 0.04 %w t sd thermal shutdown die temperature 160 c d t sd thermal shutdown hysteresis 10 c en output noise i l = i out max 160 m v shdn input v ih shdn input high threshold v in = 2.5v to 6.5v 45 %v in v il shdn input low threshold v in = 2.5v to 6.5v 15 %v in absolute maximum ratings* input voltage .................................................................7v output voltage ............................. (C 0.3v) to (v in + 0.3v) power dissipation .................... internally limited (note 7) operating temperature range ........ C 40 c < t j < 125 c storage temperature ............................ C 65 c to +150 c maximum voltage on any pin ............ v in +0.3v to C 0.3v lead temperature (soldering, 10 sec.) ................ +260 c *stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
tc1054 3 preliminary information tc1054-01 6/12/97 50ma cmos ldo with shutdown and error output electrical characteristics: v in = v out + 1v, i l = 0.1ma, c l = 3.3 m f, shdn > v ih , t a = 25 c, unless otherwise noted. symbol parameter test conditions min typ max units error output v min minimum operating voltage 1.0 v v ol output logic low voltage 1ma flows to error 400 mv v th error threshold voltage see figure 2 0.95 x v r v v hys error positive hysteresis note 8 50 mv notes: 1. v r is the regulator output voltage setting. v r = 2.5v, 2.7v, 3.0v, 3.3v, 5.0v. 2. tc v out = v out max C v out min x 10 6 v out x d t 3. regulation is measured at a constant junction temperature using low duty cycle pulse testing. load regulation is tested ov er a load range from 0.1ma to the maximum specified output current. changes in output voltage due to heating effects are covered by the thermal regulation specification. 4. dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value . 5. ground pin current is the regulator pass transistor gate current. the total current drawn from the input supply is the sum of the load current, ground current and supply current (i.e. i in = i supply + i gnd + i load ). 6. thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, e xcluding load or line regulation effects. specifications are for a current pulse equal to i lmax at v in = 6v for t = 10msec. 7. the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature an d the thermal resistance from junction-to-air (i.e. t a , t j , q ja ). exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. please see thermal considerations section of this data sheet for more details. 8. hysteresis voltage is referenced by v r . pin no. 1v in unregulated supply input. 2 gnd ground terminal. 3 shdn shutdown control input. the regulator is fully enabled when a logic high is applied to this input. the regulator enters shutdown when a logic low is applied to this input. during shutdown, output voltage falls to zero, error is open circuited and supply current is reduced to 0.05 microamp (typical). 4 error out-of-regulation flag. (open drain output). this output goes low when v out is out-of-tolerance by approximately C 5%. 5v out regulated voltage output. pin description (sot-23a-5) symbol description
tc1054 50ma cmos ldo with shutdown and error output 4 preliminary information tc1054-01 6/12/97 detailed description the tc1054 is a precision fixed output voltage regula- tor. (if an adjustable version is desired, please see the tc1070 or tc1071 data sheets.) unlike the bipolar regula- tors, the tc1054 supply current does not increase with load current. in addition, v out remains stable and within regula- tion at very low load currents (an important consideration in rtc and cmos ram battery back-up applications). figure 1 shows a typical application circuit. the regula- tor is enabled any time the shutdown input (shdn) is at or above v ih , and shutdown (disabled) when shdn is at or below v il . shdn may be controlled by a cmos logic gate, or i/o port of a microcontroller. if the shdn input is not required, it should be connected directly to the input supply. while in shutdown, supply current decreases to 0.05 m a (typical) and v out falls to zero volts and error is open circuited. error open drain output error is driven low whenever v out falls out of regu- lation by more than C 5% (typical). this condition may be caused by low input voltage, output current limiting, or thermal limiting. the error threshold is 5% below rated v out regardless of the programmed output voltage value (e.g. error = v ol at 4.75 (typ.) for a 5.0v regulator and 2.85v (typ.) for a 3.0v regulator). error output operation is shown in figure 2. note that error is active when v out falls to v th , and inactive when v out rises above v th = v hys . as shown in figure 1, error can be used as a battery low flag, or as a processor reset signal (with the addition of timing capacitor c2). r1 x c2 should be chosen to maintain error below v ih of the processor reset input for at least 200msec to allow time for the system to stabilize. pull-up resistor r1 can be tied to v out , v in or any other voltage less than (v in = 0.3v). output capacitor a 1 m f(min) capacitor from v out to ground is recom- mended. the output capacitor should have an effective series resistance of 5 w or less, and a resonant frequency above 1mhz. a 1 m f capacitor should be connected from v in to gnd if there is more than 10 inches of wire between the regulator and the ac filter capacitor, or if a battery is used as the power source. aluminum electrolytic or tanta- lum capacitor types can be used. (since many aluminum electrolytic capacitors freeze at approximately C 30 c, solid tantalums are recommended for applications operating below C 25 c.) when operating from sources other than batteries, supply-noise rejection and transient response can be improved by increasing the value of the input and output capacitors and employing passive filtering tech- niques. thermal considerations thermal shutdown integrated thermal protection circuitry shuts the regula- tor off when die temperature exceeds 160 c. the regulator remains off until the die temperature drops to approximately 150 c. power dissipation the amount of power the regulator dissipates is prima- rily a function of input and output voltage, and output current. the following equation is used to calculate worst case actual power dissipation: figure 1. typical application circuit 1 f c1 0.2 f c2 r1 1m v + c2 requires only if error is used as a processor reset signal (see text) shutdown control (to cmos logic or tie to v in if unused) battlow or reset tc1054vct v in battery v out error shdn gnd v out 1 f figure 2. error output operation v ih v ol error v th v out hysteresis (v hys )
tc1054 5 preliminary information tc1054-01 6/12/97 50ma cmos ldo with shutdown and error output in this example, the tc1054 dissipates a maximum of only 18.5mw; far below the allowable limit of 318mw. in a similar manner, equation 1 and equation 2 can be used to calculate maximum current and/or input voltage limits. layout considerations the primary path of heat conduction out of the package is via the package leads. therefore, layouts having a ground plane, wide traces at the pads, and wide power supply bus lines combine to lower q ja and therefore in- crease the maximum allowable power dissipation limit. p d ? (v in max C v out min ) i load max where: p d = worst case actual power dissipation v in max = maximum voltage on v in v out min = minimum regulator output voltage i load max = maximum output (load) current equation 1. the maximum allowable power dissipation (equation 2) is a function of the maximum ambient temperature (t a max ), the maximum allowable die temperature (125 c) and the thermal resistance from junction-to-air ( q ja ). sot-23a-5 package has a q ja of approximately 220 c/watt when mounted on a single layer fr4 dielectric copper clad pc board. p d max = (t j max C t j max ) q ja where all terms are previously defined. equation 2. equation 1 can be used in conjunction with equation 2 to ensure regulator thermal operation is within limits. for example: given: v in max = 3.0v 5% v out min = 2.7v 0.5v i load = 40ma t amax = 55 c find: 1. actual power dissipation 2. maximum allowable dissipation actual power dissipation: p d ? (v in max C v out min ) i load max = [(3.0 x 1.05) C (2.7 x .995)]40 x 10 C3 = 18.5mw maximum allowable power dissipation: p dmax = (t j max C t a max ) q ja = (125 C 55) 220 = 318mw
tc1054 50ma cmos ldo with shutdown and error output 6 preliminary information tc1054-01 6/12/97 sales offices telcom semiconductor 1300 terra bella avenue p.o. box 7267 mountain view, ca 94039-7267 tel: 415-968-9241 fax: 415-967-1590 e-mail: liter@c2smtp.telcom-semi.com printed in the u.s.a. telcom semiconductor austin product center 9101 burnet rd. suite 214 austin, tx 78758 tel: 512-873-7100 fax: 512-873-8236 telcom semiconductor h.k. ltd. 10 sam chuk street, ground floor san po kong, kowloon hong kong tel: 852-2324-0122 fax: 852-2354-9957 package dimensions sot-23a-5* dimensions: inches (mm) note: *sot-23a-5 is equivalent to the eiaj (sc-74a) .071 (1.80) .059 (1.50) .122 (3.10) .098 (2.50) 0.75 (1.90) reference .020 (0.50) .012 (0.30) .037 (0.95) reference .122 (3.10) .106 (2.70) .057 (1.45) .035 (0.90) .006 (0.15) .000 (0.00) .022 (0.55) .008 (0.20) 10 max. .010 (0.25) .004 (0.09) markings sot-23a-5 a & b = part number code + temperature range and voltage tc1054 (v) code 2.5 c1 2.7 c2 3.0 c3 3.3 c4 5.0 c6 c represents year and quarter code d represents lot id number
tc1055 1 preliminary information tc1055-01 6/5/97 100ma cmos ldo with shutdown and error output ordering information output junction part no. voltage **(v) package temp. range tc1055-2.5vct 2.5 sot-23a-5* C 40 c to +125 c tc1055-2.7vct 2.7 sot-23a-5* C 40 c to +125 c tc1055-3.0vct 3.0 sot-23a-5* C 40 c to +125 c tc1055-3.3vct 3.3 sot-23a-5* C 40 c to +125 c tc1055-5.0vct 5.0 sot-23a-5* C 40 c to +125 c note: *sot-23a-5 is equivalent to the eiaj (sc-74a) ** other output voltages available. please contact telcom semiconductor for details general description the tc1055 is a high accuracy (typically 0.5%) cmos upgrade for older (bipolar) low dropout regulators. de- signed specifically for battery-operated systems, the tc1055s cmos construction eliminates wasted ground current, significantly extending battery life. total supply current is typically 50 m a at full load ( 20 to 60 times lower than in bipolar regulators !). tc1055 key features include ultra low noise operation, very low dropout voltage (typically 200mv at full load) and internal feed-forward compensation for fast response to step changes in load. an error output (error) is asserted when the tc1055 is out-of-regulation (due to a low input voltage or excessive output current). error can be used as a low battery warning or as a processor reset signal (with the addition of an external rc network). supply current is reduced to less than 1 m a, and both v out and error are disabled when the shutdown input is low. the tc1055 incorporates both over-temperature and over-current pro- tection. the tc1055 is stable with an output capacitor of only 1 m f and has a maximum output current of 100ma. for higher output current regulators, please see the tc1107, tc1108 (i out = 300ma) data sheets. 100ma cmos ldo with shutdown and error output tc1055 pin configuration features n zero ground current for longer battery life n very low dropout voltage n guaranteed 100ma output n high output voltage accuracy n standard or custom output voltages n power-saving shutdown mode n error output can be used as a low battery detector, or processor reset generator n over-current and over-temperature protection n space-saving sot-23a-5 package n pin compatible upgrades for bipolar regulators applications n battery operated systems n portable computers n medical instruments n instrumentation n cellular/gsms/phs phones n linear post-regulators for smps n pagers telcom semiconductor reserves the right to make changes in the circuitry and specifications of its devices typical application tc1055 (sot-23a-5*) top view 1 3 4 5 2 shdn error gnd v out v in 1 f shutdown control (from power control logic) tc1055 v in 1 2 34 5 v in v out error shdn gnd 1m v out error note: *sot-23a-5 is equivalent to the eiaj (sc-74a)
tc1055 100ma cmos ldo with shutdown and error output 2 preliminary information tc1055-01 6/5/97 electrical characteristics: v in = v out + 1v, i l = 0.1ma, c l = 3.3 m f, shdn > v ih , t a = 25 c, unless otherwise noted. symbol parameter test conditions min typ max units v in input operating voltage note 9 6.5 v i out max maximum output current note 9 100 ma v out output voltage notes 1, 9 v r C 2.5% v r 0.5% v r + 2.5% v tc v out v out temperature coefficient note 2, 9 20 ppm/ c 40 d v out / d v in line regulation (v r + 1v) < v in < 6v 0.05 % d v out /v out load regulation i l = 0.1ma to i out max 0.5 % (note 3) v in C v out dropout voltage i l = 0.1ma 20 mv i l = 20ma 70 i l = 50ma 100 i l = 100ma 200 (note 4) i gnd ground pin current i l = i out max, (note 5, 9) 0 m a i in supply current shdn = v ih , i l = 0 50 80 m a i insd shutdown supply current shdn = 0v 0.05 m a r out output resistance during shutdown shdn < v il 100 x v r 160 x v r k w psrr power supply rejection ratio f re 1khz 64 db i out sc output short circuit current v out = 0v 300 500 ma d v out / d p d thermal regulation note 6 0.04 %w en output noise i l = i out max 160 nv/ ? hz shdn input v ih shdn input high threshold v in = 2.5v to 6.5v 45 %v in v il shdn input low threshold v in = 2.5v to 6.5v 15 %v in absolute maximum ratings* input voltage .................................................................7v output voltage ............................. (C 0.3v) to (v in + 0.3v) power dissipation .................... internally limited (note 7) operating temperature range ........ C 40 c < t j < 125 c storage temperature ............................ C 65 c to +150 c maximum voltage on any pin ............ v in +0.3v to C 0.3v *stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
tc1055 3 preliminary information tc1055-01 6/5/97 100ma cmos ldo with shutdown and error output electrical characteristics: v in = v out + 1v, i l = 0.1 m a, c l = 3.3 m f, shdn > v ih , t a = 25 c, unless otherwise noted. symbol parameter test conditions min typ max units error open drain output v min minimum operating voltage 1.0 v v ol output logic low voltage 1ma flows to error 400 mv v th error threshold voltage see figure 2 0.95 x v r v v hys error positive hysteresis note 8 50 mv notes: 1. v r is the regulator output voltage setting. v r = 2.5v, 2.7v, 3.0v, 3.3v, 5.0v. 2. tc v out = (v out max C v out min ) x 10 6 v out x d t 3. regulation is measured at a constant junction temperature using low duty cycle pulse testing. load regulation is tested ov er a load range from 0.1ma to the maximum specified output current. changes in output voltage due to heating effects are covered by the thermal regulation specification. 4. dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value . 5. ground pin current is the regulator pass transistor gate current. the total current drawn from the input supply is the sum of the load current, ground current and supply current (i.e. i in = i supply + i gnd + i load ). 6. thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, e xcluding load or line regulation effects. specifications are for a current pulse equal to i lmax at v in = 6v for t = 10msec. 7. the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature an d the thermal resistance from junction-to-air (i.e. t a , t j , q ja ). exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. please see thermal considerations section of this data sheet for more details. 8. hysteresis voltage is referenced by v r . 9. boldface type specifications apply for junction temperatures of C 40 c to +125 c. pin no. 1v in unregulated supply input. 2 gnd ground terminal. 3 shdn shutdown control input. the regulator is fully enabled when a logic high is applied to this input. the regulator enters shutdown when a logic low is applied to this input. during shutdown, output voltage falls to zero, error is open circuited and supply current is reduced to 0.05 microamp (typical). 4 error out-of-regulation flag. (open drain output). this output goes low when v out is out-of-tolerance by approximately C 5%. 5v out regulated voltage output. pin description (sot-23a-5) symbol description
tc1055 100ma cmos ldo with shutdown and error output 4 preliminary information tc1055-01 6/5/97 detailed description the tc1055 is a precision fixed output voltage regula- tor. (if an adjustable version is desired, please see the tc1070 or tc1071 data sheets.) unlike the bipolar regula- tors, the tc1055 supply current does not increase with load current. in addition, v out remains stable and within regula- tion at very low load currents (an important consideration in rtc and cmos ram battery back-up applications). figure 1 shows a typical application circuit. the regula- tor is enabled any time the shutdown input (shdn) is at or above v ih , and shutdown (disabled) when shdn is at or below v il . shdn may be controlled by a cmos logic gate, or i/o port of a microcontroller. if the shdn input is not required, it should be connected directly to the input supply. while in shutdown, supply current decreases to 0.05 m a (typical) and v out falls to zero volts and error is open circuited. error open drain output error is driven low whenever v out falls out of regu- lation by more than C 5% (typical). this condition may be caused by low input voltage, output current limiting, or thermal limiting. the error threshold is 5% below rated v out regardless of the programmed output voltage value (e.g. error = v ol at 4.75 (typ.) for a 5.0v regulator and 2.85v (typ.) for a 3.0v regulator). error output operation is shown in figure 2. note that error is active when v out falls to v th , and inactive when v out rises above v th by v hys . as shown in figure 1, error can be used as a battery low flag, or as a processor reset signal (with the addition of timing capacitor c2). r1 x c2 should be chosen to maintain error below v ih of the processor reset input for at least 200msec to allow time for the system to stabilize. pull-up resistor r1 can be tied to v out , v in or any other voltage less than (v in + 0.3v). output capacitor a 1 m f(min) capacitor from v out to ground is recom- mended. the output capacitor should have an effective series resistance of 5 w or less, and a resonant frequency above 1mhz. a 1 m f capacitor should be connected from v in to gnd if there is more than 10 inches of wire between the regulator and the ac filter capacitor, or if a battery is used as the power source. aluminum electrolytic or tanta- lum capacitor types can be used. (since many aluminum electrolytic capacitors freeze at approximately C 30 c, solid tantalums are recommended for applications operating below C 25 c.) when operating from sources other than batteries, supply-noise rejection and transient response can be improved by increasing the value of the input and output capacitors and employing passive filtering tech- niques. thermal considerations thermal shutdown integrated thermal protection circuitry shuts the regula- tor off when die temperature exceeds 160 c. the regulator remains off until the die temperature drops to approximately 150 c. power dissipation the amount of power the regulator dissipates is prima- rily a function of input and output voltage, and output current. the following equation is used to calculate worst case actual power dissipation: figure 1. typical application circuit 1 f c1 0.2 f c2 r1 1m v + c2 requires only if error is used as a processor reset signal (see text) shutdown control (to cmos logic or tie to v in if unused) battlow or reset tc1055vct v in battery v out error shdn gnd v out 1 f figure 2. error output operation v ih v ol error v th v out hysteresis (v hys )
tc1055 5 preliminary information tc1055-01 6/5/97 100ma cmos ldo with shutdown and error output in this example, the tc1055 dissipates a maximum of only 60mw; far below the allowable limit of 318mw. in a similar manner, equation 1 and equation 2 can be used to calculate maximum current and/or input voltage limits. for example, the maximum allowable v in is found by substitut- ing the maximum allowable power dissipation of 318mw into equation 1, from which v in max = 5.9v. layout considerations the primary path of heat conduction out of the package is via the package leads. therefore, layouts having a ground plane, wide traces at the pads, and wide power supply bus lines combine to lower q ja and therefore in- crease the maximum allowable power dissipation limit. p d ? (v in max C v out min ) i load max where: p d = worst case actual power dissipation v in max = maximum voltage on v in v out min = minimum regulator output voltage i load max = maximum output (load) current equation 1. the maximum allowable power dissipation (equation 2) is a function of the maximum ambient temperature (t a max ), the maximum allowable die temperature (125 c) and the thermal resistance from junction-to-air ( q ja ). sot-23a-5 package has a q ja of approximately 220 c/watt when mounted on a single layer fr4 dielectric copper clad pc board. p d max = (t j max C t j max ) q ja where all terms are previously defined. equation 2. equation 1 can be used in conjunction with equation 2 to ensure regulator thermal operation is within limits. for example: given: v in max = 3.0v 5% v out min = 2.7v 0.5v i load = 40ma t amax = 55 c find: 1. actual power dissipation 2. maximum allowable dissipation actual power dissipation: p d ? (v in max C v out min ) i load max = [(3.0 x 1.05) C (2.7 x .995)]40 x 10 C3 = 18.5mw maximum allowable power dissipation: p dmax = (t j max C t a max ) q ja = (125 C 55) 220 = 318mw
tc1055 100ma cmos ldo with shutdown and error output 6 preliminary information tc1055-01 6/5/97 sales offices telcom semiconductor 1300 terra bella avenue p.o. box 7267 mountain view, ca 94039-7267 tel: 415-968-9241 fax: 415-967-1590 e-mail: liter@c2smtp.telcom-semi.com printed in the u.s.a. telcom semiconductor austin product center 9101 burnet rd. suite 214 austin, tx 78758 tel: 512-873-7100 fax: 512-873-8236 telcom semiconductor h.k. ltd. 10 sam chuk street, ground floor san po kong, kowloon hong kong tel: 852-2324-0122 fax: 852-2354-9957 package dimensions sot-23a-5* dimensions: inches (mm) note: *sot-23a-5 is equivalent to the eiaj (sc-74a) .071 (1.80) .059 (1.50) .122 (3.10) .098 (2.50) 0.75 (1.90) reference .020 (0.50) .012 (0.30) .037 (0.95) reference .122 (3.10) .106 (2.70) .057 (1.45) .035 (0.90) .006 (0.15) .000 (0.00) .022 (0.55) .008 (0.20) 10 max. .010 (0.25) .004 (0.09) markings sot-23a-5 a & b = part number code + temperature range and voltage tc1055 (v) code 2.5 d1 2.7 d2 3.0 d3 3.3 d4 5.0 d6 c represents year and quarter code d represents lot id number

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